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T6K14
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
T6K14
COLUMN AND ROW DRIVER LSI FOR A DOT MATRIX GRAPHIC LCD
The T6K14 is a driver for a small-to-medium-sized dot matrix graphic LCD, especially for reflective color STN LCD. It realizes a Unit: mm 4-color or 4-gray-scale display. This driver can be interfaced to Lead Pitch the MPU via an 8-bit (68/80-series) or a serial interface, and is T6K14 operated asynchronously with the MPU. Since the T6K14 IN OUT contains a CR oscillator, it can generate the timing signals (UBW, 5NS) 0.60 0.23 required for the LCD. Since the T6K14 has 128 outputs for the Please contact with Toshiba agents for LCD drive (segment) signals that constitute display data, 65 each packaging outline dimensions. outputs for the LCD drive (common) signals that constitute scanning signals and 65 x 128 x 2 bits display RAM, this single device allows you to drive an LCD panel comprised of up to 128 x 64 dots and 128 icons with a minimize of power requirement. It TCP (Tape Carrier Package) has 4 gray-scale function. The display RAM of this driver is a 2 port RAM so that the MPU accesses without any wait time. It has various power circuits such as a voltage regulators, voltage divider resistors, a power supply op-amp, a contrast control circuit, a temperature compensation circuit, and DC-DC converter ( x2, x3, x4, x5 ). All these circuits enable the LCD panel to be driven with a single power supply.
Features
l LCD driver output l Built in display RAM l Gray scale l Word length l Duty cycle l Display modes : 64 rows + 128 columns + 128 icons : 65 x 128 x 2 = 16640 bits, 2-port RAM : 4 gray-scale selectable : 8-bit/word : 1/2 duty (power save mode) 1/35, 1/49, 1/57, 1/65 duty selectable (normal display mode)Display mode : Normal mode (Full display) Power save mode (Icon display) Stand by mode (Clock stopped) : CR oscillator with external resistors Low frequency operation 82 kHz oscillation for FR frequency 70 Hz (1/65 duty) : Voltage regulator, Voltage divider, Voltage follower op-amp. DC-DC converter (x2, x3, x4, x5), Temperature compensation circuit, Contrast control circuit. : Interfacing with 68/80 series MPU and Serial Interface : VDD = 2.4 to 3.3 V, VIN = 2.7 to 3.3 V : VCC1, 2 = 6.0 to 16.5 V, if case of used the voltage Regulator, VCC2 output voltage at 12.5 V or 11.0 V (typ.) Ta = 25C : ISS = 200 A (typ.) : VDD = 2.7 V, VIN = 2.7 V, using the DC-DC converter (x5), no data access, op-amp on, fosc = 82 kHz (internal clock), no load, 1/65 duty, temperature compensation circuit off. :
Product T6K14 (xxx, xxx) JBT6K14-AS Package TCP (Tape carrier package) Gold bump chip
l Clock oscillator l Power circuit
l CPU interface l Logic operating voltage l LCD drive voltage l CMOS process l Low power consumption Condition
l Package
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T6K14
Block Diagram
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T6K14
Pin Configuration
Note:
Above drawing describes pin configuration of the LSI Chip, it doesn't define the tape carrier package.
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T6K14
PAD Specification
Item Chip Size (1) Chip Tip Coordinates (2) (3) (4) Bump Pitch Bump Height Size 8960x5050 -4480, -2525 -4480, 4480, 2525 2525 m Unit m
4480, -2525 70 (Min) 15 (Typ.) m
m
Item Input Pin Output Pin FUSE Pin TEST Pin
Number of Pins 114 (Including dummy pins) 208 (Including dummy pins) 12 19 (Note 1) (Note 1)
Note 1: FUSE (No.115 to 126) and TEST (No.335 to 353) are LSI test pins, leave these pins open.
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Pad Layout
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T6K14
Pad Coordinates
[Unit: m] No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 Name DUMMY1 VLC2 VLC2 DUMMY2 VLC1 VLC1 DUMMY3 VLC0 VLC0 DUMMY4 DUMMY5 VCC2 VCC2 DUMMY6 DUMMY7 DUMMY8 DUMMY9 VCC1 VCC1 VCC1 VCC1 DUMMY10 VOUT4 VOUT4 C4B C4B C4A C4A VOUT3 VOUT3 C3B C3B C3A C3A VOUT2 VOUT2 C2B C2B C2A C2A VOUT1 VOUT1 C1B C1B C1A C1A VIN X-Point -4203 -4121 -4049 -3977 -3905 -3833 -3761 -3689 -3617 -3545 -3401 -3329 -3257 -3185 -3113 -3041 -2969 -2897 -2825 -2753 -2681 -2609 -2537 -2465 -2393 -2321 -2249 -2177 -2105 -2033 -1961 -1889 -1817 -1745 -1673 -1601 -1529 -1457 -1385 -1313 -1241 -1169 -1097 -1025 -953 -881 -809 Y-Point -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 No. 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 Name VIN DUMMY11 DUMMY12 VR32 VR32 VR12 VR12 VSS VSS VSS VSS VSS DUMMY13 OSC2 DUMMY14 OSC1 DUMMY15 VDD VDD VDD VDD CIN RT RU VDD /STB FR PM CL CK SYNC VSS M/S VDD MD VSS SCK SI SO VDD 68/80 VSS RS VDD /RST D/I /WR X-Point -737 -665 -521 -449 -377 -305 -233 -161 -89 -17 55 127 199 271 343 415 487 559 631 703 775 847 919 991 1063 1135 1207 1279 1351 1423 1495 1567 1639 1711 1783 1855 1927 1999 2071 2143 2215 2287 2359 2431 2503 2575 2647 Y-Point -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 No. 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 Name /RD VSS RS VDD CS2 /CS1 VSS DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DUMMY16 DUMMY17 DUMMY18 DUMMY19 DUMMY20 FUSE25 FUSE24 FUSE2G FUSE23 FUSE22 FUSE21 FUSE35 FUSE34 FUSE3G FUSE33 FUSE32 FUSE31 DUMMY21 COM32 COM31 COM30 COM29 COM28 COM27 COM26 COM25 COM24 COM23 COM22 COM21 COM20 COM19 X-Point 2719 2791 2863 2935 3007 3079 3151 3223 3295 3367 3439 3511 3583 3655 3727 3799 3871 3943 4015 4097 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 Y-Point -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2293 -2129 -1994 -1869 -1744 -1619 -1494 -1369 -1244 -1119 -994 -869 -744 -619 -468 -398 -328 -258 -188 -118 -48 22 92 162 232 302 372 442
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[Unit: m] No. 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 Name COM18 COM17 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 ICOM1A SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 X-Point 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4280 4107 4026 3956 3886 3816 3746 3676 3606 3536 3466 3396 3326 3256 3186 3116 3046 2976 2906 2836 2766 2696 2626 2556 Y-Point 512 582 652 722 792 862 932 1002 1072 1142 1212 1282 1352 1422 1492 1562 1632 1702 1772 1842 1912 1982 2052 2133 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 No. 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 Name SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 X-Point 2486 2416 2346 2276 2206 2136 2066 1996 1926 1856 1786 1716 1646 1576 1506 1436 1366 1296 1226 1156 1086 1016 946 876 806 736 666 596 526 456 386 316 246 176 106 36 -34 -104 -174 -244 -314 -384 -454 -524 -594 -664 -734 Y-Point 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 No. 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 Name SEG76 SEG77 SEG78 SEG79 SEG80 SEG81 SEG82 SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95 SEG96 SEG97 SEG98 SEG99 SEG100 SEG101 SEG102 SEG103 SEG104 SEG105 SEG106 SEG107 SEG108 SEG109 SEG110 SEG111 SEG112 SEG113 SEG114 SEG115 SEG116 SEG117 SEG118 SEG119 SEG120 SEG121 SEG122 X-Point -804 -874 -944 -1014 -1084 -1154 -1224 -1294 -1364 -1434 -1504 -1574 -1644 -1714 -1784 -1854 -1924 -1994 -2064 -2134 -2204 -2274 -2344 -2414 -2484 -2554 -2624 -2694 -2764 -2834 -2904 -2974 -3044 -3114 -3184 -3254 -3324 -3394 -3464 -3534 -3604 -3674 -3744 -3814 -3884 -3954 -4024 Y-Point 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325 2325
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[Unit: m] No. 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 Name SEG123 SEG124 SEG125 SEG126 SEG127 SEG128 COM33 COM34 COM35 COM36 COM37 COM38 COM39 COM40 COM41 COM42 COM43 COM44 COM45 COM46 COM47 COM48 COM49 COM50 X-Point -4105 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 Y-Point 2325 2133 2052 1982 1912 1842 1772 1702 1632 1562 1492 1422 1352 1282 1212 1142 1072 1002 932 862 792 722 652 582 No. 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 Name COM51 COM52 COM53 COM54 COM55 COM56 COM57 COM58 COM59 COM60 COM61 COM62 COM63 COM64 ICOM1B DUMMY22 VLC5 VLC5 VLC5 VLC5 DUMMY23 VLC4 VLC4 DUMMY24 X-Point -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 -4280 Y-Point 512 442 372 302 232 162 92 22 -48 -118 -188 -258 -328 -398 -468 -619 -744 -869 -994 -1119 -1244 -1369 -1441 -1619 No. 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 Name VLC3 VLC3 DUMMY25 DUMMY26 TEG1 TEG2 TEG3 TEG4 TEG5 TEG6 TEG7 TEG8 TEG9 TEG10 TEG11 TEG12 TEG13 TEG14 TEG15 TEG16 TEG17 TEG18 TEG19 X-Point -4280 -4280 -4280 -4280 2249 2349 2449 2588 2688 2788 2249 2349 2449 -2448 -2448 -2448 -2448 -2448 -2448 -2448 -2448 -2448 -2448 Y-Point -1797 -1869 -1994 -2119 -450 -450 -450 -450 -450 -450 -301 -301 -301 1172 1072 972 872 699 599 499 399 201 101
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Pin Function (1)
Pin Name SEG1 to SEG128 COM1 to COM64 ICON DB0 to DB7 /CS1 I/O Output Output Output I/O Input LCD drive column (segment) signals LCD drive row (common) signals LCD drive row (common) signals for icon Data bus Input for chip select signal Data write: Data write enable at the rising edge of /CS1. Data read : Data read out while /CS1 is in Low level. Input for chip select signal Data write: Data write enable at the falling edge of CS2. Data read : Data read out while CS2 is in High level. Input for Data/Instruction select signal D/I = H Indicates that the data on DB0 to DB7 or SI is the display data. D/I = L Indicates that the data on DB0 to DB7 or SI is the instruction data. Input for write enable signal /WR = L State of select Input for read enable signal /RD = L State of select Input for register/mode select signal Input for parallel interface/serial interface select signal P/S = H Parallel interface is selected. SI and SCK must be connected to VDD or VSS. P/S = L Serial interface is selected. DB0 to DB7, /WR and/RD must connected to VDD or VSS. Input for 68 series MPU/80 series MPU select signal 68/80 = H 68 series MPU selected 68/80 = L 80 series MPU selected Output for serial data Input for serial data Input for serial clock Input for reset signal /RST = L State of select Function
CS2
Input
D/I
Input
/WR /RD RS
Input Input Input
P/S
Input
68/80 SO SI SCK /RST
Input Output Input Input Input
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Pin Function (2)
Pin Name I/O Function Input for standby signal Usually connected to VDD /STB = L T6K14 is the state of standby. Column and row drive signal is VSS level, and on-chip oscillator is stop. When using a internal clock oscillator, connect a resistor between OSC1 and OSC2. When using a external clock, input the clock to OSC1 and leave OSC2 open. Power supply for DC-DC converter Input for clock of temperature compensation Connect with standard resistor Connect with thermistor Connect with capacitance for x2 mode DC-DC converter output terminal (x2 level) Connect with capacitance for x3 mode DC-DC converter output terminal (x3 level) Connect with capacitance for x4 mode DC-DC converter output terminal (x4 level) Connect with capacitance for x5 mode DC-DC converter output terminal (x5 level) LV regulator monitor terminal LV regulator monitor terminal Power supply for LCD driver circuit Power supply for HV regulator monitor terminal Power supply for LCD driver circuit VLC5 terminal is connect to VSS. Power supply for logic circuit. Ground: Reference (Note) (Note) (Note) (Note)
/STB
Input
OSC1, OSC2 VIN CIN RU RT C1A, C1B VOUT1 C2A, C2B VOUT2 C3A, C3B VOUT3 C4A, C4B VOUT4 VR12 VR32 VCC1 VCC2 VLC0 to VLC5 VSS, VDD
I/O I/O
Note: Connect the capacitance between this terminal and VSS.
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Pin Function (3)
Pin Name MD M/S I/O Input Input Mode detect pin for Status Read Input for master/slave selects M/S = H T6K14 is master chip M/S = L T6K14 is slave chip Input/Output for shift clock pulse Master mode (M/S = H) output Slave mode (M/S = L) input Input/Output for frame signal Master mode (M/S = H) output Slave mode (M/S = L) input Input/Output for display synchronous signal Master mode (M/S = H) output Slave mode (M/S = L) input Input/Output for grayscale signal data Master mode (M/S = H) output Slave mode (M/S = L) input Input/Output for grayscale signal data Master mode (M/S = H) output Slave mode (M/S = L) input Function
CL
I/O
PM
I/O
FR
I/O
SYNC
I/O
CK
I/O
Pin Function (4)
PS 68/80 L H L L/H Interface Type 80 series MPU (/CS1) 80 series MPU (CS2) 68 series MPU Serial interface /CS1 /CS1 L L L CS2 H CS2 H H D/I A0 A0 A0 L/H RS A1 A1 A1 L/H /WR /WR /WR R/W L/H /RD /RD /RD E L/H SO Open Open Open SO SI L/H L/H L/H SI SCK L/H L/H L/H SCK DB0 to DB7 DB0 to DB7 DB0 to DB7 DB0 to DB7 Open
H
Note:
H denotes the VDD level; L denotes the VSS level.
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Function of Each Block
Interface logic
The T6K14 can be operated with 80 series MPUs or 68 series MPUs or Serial Interface. Fig. 1 shows an example of interface. For details, please refer to the example interface part of application circuit.
Fig. 1
Fig. 2
Input register
The register stores 8 bit data from MPU. D/I signal discriminate between command data and display data.
X-address counter
X-address counter is 64-Up/Down counter. It holds the row address for the display RAM. Then it is selected by the command, writing to or reading the data of display RAM causes the X-address to automatically increment or decrement.
Y (Page) -address counter
The Y (Page) -address counter is 32-Up/Down counter. It holds the column address for the display RAM. This counter is selected by the command. Writing to or reading the display RAM causes the Y-address to automatically increment or decrement.
Z-address counter
The Z-address counter is 64-Up counter that provide the display RAM data for the LCD drive circuit. The data stored in Z-Address Register is send to Z-Address counter as Z start address. For instance, when Z start address is 16, the counter increment like this: 16, 17, 18***, 62, 63, 0, 1, 2***14, 15, 16. Therefore, the display start line is 16-line of the display RAM.
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Up/Down register
The 1 bit data stored in this register selects Up or Down mode of X and Y (Page) -address counter.
Counter select register
The 1 bit data stored in this register selects X-address counter or Y (Page) -address counter.
Display ON/OFF register
This 1 bit register holds the display ON or OFF state. In the OFF state, the output data from the display RAM is not selected. In the On state, the display data appears according to the display RAM data. The display ON or OFF state does not affect the data of display RAM.
Z-address register
This 6 bits register holds the data that indicates the display start line.
Oscillator
The T6K14 has an on-chip oscillator. When using this oscillator, connect an external resistor between OSC1 and OSC2. When using external clock, input the clock to OSC1 and open OSC2, as shown in Fig. 3.
Fig. 3
Timing generation circuit
The circuit divides the signals from the oscillator and generates display timing signals and operating clock.
Shift-register
The T6K14 has two 32 bits shift-register and shift register of ICON. These shift-register construct 65 bits shift-register.
Latch circuit
This latch circuit latches the data from the display RAM.
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Column driver circuit
Column driver circuit consists of 128 driver circuits. One of the four LCD driving level is selected by the combination of M (internal signal) and the display data transferred from the latch circuit. Details of column driver circuit are shown in Fig. 4.
Fig. 4
Row driver circuit
Row driver circuit consists of 65 drive circuits. One of the four LCD driving level is selected by the combination of M (internal signal) and the data from the sift register. Details of row driver circuit are shown in Fig. 5.
Fig. 5
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DC-DC converter
The T6K14 built in DC-DC converter circuit 2/3/4/5 times. Voutn = 0 (VSS level) is at the time of /RST = L or /STB = L. The capacitor for DC-DC converter and the capacitor for DC-DC level maintenance usually use about 1.0F. Since the power supply VIN terminal for DC-DC converter circuit can input voltage usually higher than a digital system power supply VDD terminal, it can generate required LCD voltage in a DC-DC converter. However, since the maximum of LCD operation voltage is 16.5 V (max) be careful about the relation of the voltage conditions (VIN voltage) and the number of the DC-DC steps which are used in a DC-DC converter so that the DC-DC converted voltage (voltage value outputted from Vout) does not exceed 16.5 V. Note 1: Power supply voltage ........ 3.3 V VIN 2.7 V, VIN VDD Note 2: LCD voltage ................... 16.5 V VIN x n (n: number of DC-DC steps) ex) Using the x5 mode
About Terminal Processing
Conditions x2 mode x3 mode x4 mode x5 mode None C1A, C1B O O O O Open VOUT1 O O O O Open C2A, C2B Open O O O Open VOUT2 Open O Open Open Open C3A, C3B Open Open O O Open VOUT3 Open Open O Open Open C4A, C4B Open Open Open O Open VOUT4 Open Open Open O Open
Note: O = Connect the capacitance. Note: The voltage outputted from DC-DC converter changes with voltage condition, temperature environment, substrate environment, etc.
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Voltage driver resistor, contrast control circuit (Normal mode)
The T6K14 has on-chip resistors to divide bias voltage with op-amp., and a contrast control circuit. The voltage bias is changed by instruction command. And one of four bias is selected.
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Contrast control circuit (Power Save Mode)
Contrast control output voltage (VLC0) (Typical Value)
Condition Power Save VR32 [V] 3.2 VLC0 (min) [V] 2.2 VLC0 (max) [V] 5.0 Contrast Step [mV] 11.0 Bias 1/12
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Temperature compensation circuit
The T6K14 has the temperature compensation circuit.
While this temperature compensation circuit detects temperature, it controls automatically built-in contrast control. And, original contrast control suitable for all LCD material can be created by writing data in RAM for temperature compensation circuit (TMP-RAM). Please refer to description of a function about the usage.
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Command Definition
Command Register set (REG) Status read (STRD) Data mode (DMD) Display mode (DPE) Power mode (PWE) Duty/Bias Select (DTE) Oscillation (OSE) X, Y-address (SXYE) Z-address (SZE) Contrast control (SCE) TMP mode (TMPM) TMP-RAM address (TMPA) FRS control mode (FRSC) Grayscale (1) (GR1) Normal display pattern Grayscale (2) (GR2) Normal display pattern Grayscale (3) (GR3) Normal display pattern Grayscale (4) (GR4) Normal display pattern Grayscale (5) (GR5) Power save display pattern Grayscale (6) (GR6) Power save display pattern Grayscale (7) (GR7) Power save display pattern Grayscale (8) (GR8) Power save display pattern TMP-RAM address read Test mode Data write (DAWR) Data read (DARD) Reg. No. R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 to 31 D/I 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 RS 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 /WR 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 /RD 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 * 0 0 0 0 0 0 1 0 0 DB7 0 MD 0 0 x4/x5 DB6 0 * 0 DB5 0 TMP HVR 0 0 0 0 DB4 DB3 DB2 DB1 DB0
Register (0 to 31) N/F 0 0 0 0 0 0 DP D/TM 0 VR 0 0 Y/X Y/X N/F OP U/D U/D DP DC
CDR SDR 0 0
Bias (5 to 9) 0 F/N 0 0 0 0
Duty (0 to 3) 0 OSC
X-Address (0 to 63) Y-Address (0 to 31) Z-Address (0 to 63) Contrast Control (0 to 255) 0 0 TMO F 0 time (0 to 3)
TMP-RAM address (0 to 127) FR control (0 to 63)
Grayscale pattern data (1) Normal display data = "00" *** 16 bits Grayscale pattern data (2) Normal display data = "01" *** 16 bits Grayscale pattern data (3) Normal display data = "10" *** 16 bits Grayscale pattern data (4) Normal display data = "11" *** 16 bits Grayscale pattern data (5) Power save display data = "00" *** 16 bits Grayscale pattern data (6) Power save display data = "01" *** 16 bits Grayscale pattern data (7) Power save display data = "10" *** 16 bits Grayscale pattern data (8) Power save display data = "11" *** 16 bits TMP-RAM address data (7 bits) Please do not using this register Write data Read data
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Register set
Identify register number R0 (00H) to R31 (1FH) Note: R28 to R31 registers are provided for test. Please do not choose these registers.
R0: Data mode
D/TM Y/X U/D
: Selects between display RAM address and TMP-RAM address counters. D/TM = 1: Display RAM counter is selected. D/TM = 0: TMP-RAM counter is selected. : Selects between X-counter and Y-counter. Y/X = 1: Y-counter is selected. Y/X = 0: X-counter is selected. : Sets a counter mode. U/D = 1: Up mode is selected. U/D = 0: Down mode is selected.
R1: Display mode
CDR SDR N/F DP
: Sets the common data scanning direction. CDR = 1: COM1 COM64 ICON CDR = 0: COM64 COM1 ICON : Sets the segment data direction See "RAM map and CDR, SDR relation" : Selects between normal display mode and Power save mode. N/F = 1: Normal display mode is selected. N/F = 0: Power save mode (Flag display only) is selected. : Turns display ON or OFF. DP = 1: Display is turned ON. DP = 0: Display is turned OFF.
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T6K14
R2: Power management
X4/X5 : X4/X5 = 0: LCD voltage regulator output voltage is 12.5 V typ. (at Ta = 25C) X4/X5 = 1: LCD voltage regulator output voltage is 11.0 V typ. (at Ta = 25C) : LCD voltage regulator (HVR) VR = 1: Voltage regulator is turned ON. VR = 0: Voltage regulator is turned OFF. Input the voltage to VCC2 pin. : Op-amp OP = 1: Op-amp is turned ON. OP = 0: Op-amp is turned OFF. Input various voltage to VLC0 to VLC4 pins. : DC-DC converter DC = 1: DC-DC converter is turned ON. DC = 0: DC-DC converter is turned OFF. Input the voltage to VCC1 pin.
VR
OP
DC
Note: Refer to the description of a function for the combination of a power supply setup.
R3: Bias/Duty select
(Note): The T6K14s COM output which corresponds to the line of LCD is changed by the Duty. When CDR = 1, COM outputs in each Duty are shown below.
1/n duty 1/65 duty 1/57 duty 1/49 duty 1/35 duty LCD 1 line,
st
2
nd
line, * * * * * * * * * * * * * * * * * * * * *, n line, ICON
th
COM1, COM2, * * * * * * * * * * *,COM32, COM33, COM34, * * * * * *,COM64, ICON COM1, COM2, * * * * * * * * *,COM28, COM33, COM34, * * * * * *,COM60, ICON COM1, COM2, * * * * * * *,COM24, COM33, COM34, * * * * * *,COM56, ICON COM1, COM2, * * * * *,COM17, COM33, COM34, * * * * * *,COM49, ICON
R4: Oscillator control
OSC
: Oscillator OSC = 1: Oscillator is turned ON.
OSC = 0: Oscillator is turned OFF. Input an external clock to OSC1 pin.
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T6K14
R5: X-address, Y-address set
(1) X-address set
). F/N = 0: Sets display RAM address (in the range 0 to 63 F/N = 1: Sets flag RAM (The data from DB0 to DB5 is ignored) Note: Since the effective range of X-address changes by duty setup, pleace be careful.
(Note)
(2) Y-address set
R6: Z-address set
This command sets a Z-address. The display RAM and flag RAM are separated and only the display RAM is selected. By selecting any address in the column direction of the display RAM, it is possible to set the first line on the LCD screen. The display data can be scrolled in the vertical direction by setting the first line in this way. Since the effective range of Z-address changes by duty setup, please be careful. Please refer to description of a function for details.
R7: Contrast control
This command sets contrast. It becomes the maximum contrast when data is 255, and it becomes the minimum contrast when data is 0. When a temperature compensation circuit is used, data for a contrast control circuit are changed to the sum of R7 register 8-bit data and TMP-RAM 8-bit data. Therefore, the contrast is controlled.
R8: TMP mode
TMOF: Temperature compensation ON/OFF TMOF = 1: ON TMOF = 0: OFF (Note 1) Note 1: Data on the output bus of the temperature table RAM are fixed on Low data. Therefore, data on the contrast control register are inputted to contrast control circuit.
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R9: TMP-RAM address
This command sets TMP-RAM address. In case of using this command, counter up mode only.
R10: FRS control
This command sets the number of the row lines for polarity change. The setting of FRS corresponds to the row line number, see following table.
FRS 0 n Frame In case 1/x duty is selected by R3, FR signal inverts on every x line. FR signal inverts on every (n + 1) line. (Note)
Note: In case FRS = 0; FR signal inverts synchronously with the earlier edge of COM1. In case FRS 0 (1 to 63); FR signal inverts synchronously with the edge of COMm. (m = 1 to 64, or ICON) "m" shows a COM line right after the instruction practice.
R11 to R26: Grayscale data
This register have the PWM (Pulse Width Modulation) and FRC (Frame Rate Control) control data. PWM chooses one of 10 kinds and assigns data of PWM to four frames.
This register is constituted from "0th FR data" by 4 bits of "3rd FR data", and inputs PWM data into four FR data. That is, it becomes data of one color (one grayscale level) by 4 frames.
Display Mode Display RAM Data 0 Normal Display Mode 0 1 1 0 Power Save Mode 0 1 1 0 1 0 1 0 1 0 1 Register No. R11, 12 R13, 14 R15, 16 R17, 18 R19, 20 R21, 22 R23, 24 R25, 26 Grayscale Data 4 bits x 4 4 bits x 4 4 bits x 4 4 bits x 4 4 bits x 4 4 bits x 4 4 bits x 4 4 bits x 4
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T6K14
Data of PWM (Pulse Width Modulation)
*: Note:
The phase of PWM turn over by the even/odd of the output pin. This area is selected to off level (0/9 level)
R27: TMP-RAM address read
This register stores the address equivalent to the temperature detected by the temperature compensation circuit. (Read out only). When the temperature compensation circuit is used, the contrast is controlled by the sum of TMP-RAM data specified by this address, and the data in the R7 register.
R28 to 31: Test mode
Please don' t access this register.
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Status read
MD : When MD terminal is connected to VDD level, MD (DB7) = 1. When MD terminal is connected to VSS level, MD (DB7) = 0. TMP : When TMP = 1, the temperature compensation circuit is turned ON. When TMP = 0, the temperature compensation circuit is turned OFF. HVR : When HVR = 1, HV - Regulator X 4 mode is selected. When HVR = 0, HV - Regulator X 5 mode is selected. N/F : When N/F = 1, Normal display mode is selected. When N/F = 0, Power save mode (FLAG display only) is selected. DP : When DP = 1, Display is turned ON. When DP = 0, Display is turned OFF.
Y/X : When Y/X = 1, Y - counter is selected. When Y/X = 0, X - counter is selected. U/D : When U/D = 1, X and Y counters are in up mode. When U/D = 0, X and Y counters are in down mode.
Write/read data (DAWR/DARD)
The command DAWR writes 8-bit data to Display RAM or TMP-RAM. The command DARD reads 8-bit data from Display RAM or TMP-RAM.
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Function Description
Display data bit
SDR = 1
SDR = 0
Display mode
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RAM map and CDR, SDR relation
(1) CDR = 1, SDR = 1 (2) CDR = 1, SDR = 0
(3) CDR = 0, SDR = 1
(4) CDR = 0, SDR = 0
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Reset function
When/RST = L, reset function is executed and following instruction (resister) are executed.
Command Data mode Display mode Power mode Duty/Bias Oscillator X, Y-address Z-address Contrast control TMP mode TMP-RAM address FRS control mode Gray scale Reg No. R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 to R27 DB7 * * 1 1 * 0 * 0 * * * 0 DB6 * 1 * 0 * 0 * 0 * 0 * 0 DB5 * 1 * 0 * 0 0 0 * 0 0 0 DB4 * * * 1 * 0 0 0 * 0 0 0 DB3 * * * * * 0 0 0 0 0 0 0 DB2 1 * 0 * * 0 0 0 * 0 0 0 DB1 1 1 0 1 * 0 0 0 0 0 0 0 DB0 1 0 0 1 1 0 0 0 0 0 0 0
Standby function
When/STB = L, the T6K14 is in standby state. The internal oscillation is stopped, power consumption is reduced, and power supply for LCD (VLC0 to VLC5) become VSS.
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T6K14
Expansion function
The T6K14 has expansion function. When using this function, the T6K14 (2 chip) can drive 256 x 64 + icon dots LCD panel (maximum) or 128 x 128 + icon dots LCD panel (Maximum). Next table shows the selectable function by using M/S pins.
M/S H One chip mode Disable expansion model Two chips mode (Master chip) Timing signal and power voltage supply to Slave chip. L Two chips mode (Slave chip) Timing signal and power voltage are supplied from Master chip.
Fig. 6 and Fig.7 illustrate the application example of disable expansion mode and enable expansion mode. In enable expansion mode (Tow chip mode) As shown in Fig.7-1, Fig.7-2 Master chip supplies LCD drive signals and power voltage to slave chip. (The oscillator, the timing circuits, Op-amp, and Contrast control circuit are disable.)
(1) Disable expansion mode
Fig. 6
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(2) Enable expansion mode
Fig. 7-1
Fig. 7-2
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T6K14
X-address counter and Y (Page) -address counter
Fig. 8-1 shows a sample of operating procedure for the X-address counter. After reset is executed, X-address becomes X-address = 0, then select X-counter/Up mode. Next set the X -address to 62 by commanding SXYE (R5). After data has been written to or read, the X-address is automatically incremented by one. After X-counter/Down mode has been selected and data has been written to or read, the X-address is automatically decremented by one. When the X-counter is selected, Y-counter does not count up or down. And flag-counter does not count up or down too.
Fig. 8-1
Fig. 8-2 shows a sample operating procedure for the Y-address counter. After reset is executed, Y (Page) -address becomes Y-address = 0, then select Y (Page) -counter/Up -mode. After data has been written to or read, the Y (Page) -address counter is automatically incremented by one. After Y (Page) -counter/Down mode has been selected and data has been written to or read, the Y (Page) -address is automatically decremented by one. When the Y (Page) -counter is selected, X -counter doesn't count up or down.
Fig. 8-2
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LCD Driver Waveform (Case of normal mode)
Maximum Ratings (Ta = 25C)
Item Supply Voltage (1) Supply Voltage (2) Input Voltage Operating Temperature Storage Temperature Symbol VDD (Note 1) VLC1, 2, 3, 4, 5 VCC1, VCC2 Vinp (Note 1, 2) Topr Tstg Rating -0.3 to 7.0 VSS + 18.0 to VSS - 0.3 -0.3 to VDD + 0.3 -30 to 85 -55 to 125 Unit V V V C C
Note 1: Referred to VSS = 0 V Note 2: Applied data bus terminals and Input terminals expect VCC1, VCC2, VLC0, VLC1, VLC2, VLC3, VLC4, VLC5.
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Electrical Characteristics DC Characteristics (1) Test conditions: Unless Otherwise Noted, VSS = 0 V,
Item Operating Supply (1) Operating Supply (2) Operating Supply (3) Symbol VDD VIN VLC0 VCC1, 2 Test Circuit Condition VDD = 2.8 to 3.3 V H Level Input Level L Level VIL VIH VDD = 2.4 to 2.8 V Min 2.4 2.7 6.0 - VSS 0.7 VDD 0.8 VDD 0 VDD - 0.2 0 (Note 1) Typ. Max 3.3 3.3 16.5 - VSS VDD V VDD 0.2 VDD VDD 0.2 7.5
VDD = 2.4 to 3.3 V, VIN = 2.7 to 3.3 V, VCC = 6.0 to 16.5 V, Ta = 25C
Unit V V V Applicable Terminal VDD VIN VLC0, VCC1, VCC2 DB0 to DB7, D/I,/WR, /RD,/CS1, CS2,/RST, /STB, RS, SI, SCK, P/S, 68/80, CL, PM, FR, SYNC, CK DB0 to DB7, SO, CL, PM, FR, SYNC, CK SEG1 to SEG128 SEG1 to SEG128 COM1 to COM64,ICON COM1 to COM64, ICON DB0 to DB7, D/I,/WR, /RD,/CS1, CS2,/RST, /STB, RS, SI, SCK, P/S, 68/80, CL, PM, FR, SYNC, CK OSC1 OSC1 OSC1 OSC1 VSS VSS VSS
V
Output Level
H Level L Level
VOH VOL Rcol1

IOH = -400 A IOL = 400 A

V V k
Normal Mode Column Driver On Power Resistance Save Mode Normal Row Driver Mode On Power Resistance Save Mode
Rcol2
(Note 2)
15.0
k
Rrow1
(Note 1)
1.5
k
Rrow2
(Note 2)
5.0
k
Input Leakage
IIL
Vinp = VDD to GND
-1
1
A
Operating Freq External Clock Freq External Clock Duty External Clock Rise/Fall Time Current Consumption (1) Current Consumption (2) Current Consumption (3)
fOSC fex fduty tr/tf ISS1 ISS2 ISSSTB

(Note 7) (Note 6)
69 45
82 82 50 200 500
95 55 50 350 700 1
kHz kHz % ns A A A
(Note 3) (Note 4) (Note 5)
-1
Note 1: VSS + VLC0 = 11.0 V, Load voltage = 0.5 V, 1/9 bias Note 2: VSS + VLC0 = 3.0 V, Load voltage = 0.5 V, 1/12 bias Note 3: VDD = 2.7 V, VCC1, 2 = VOUT4 (X5 mode), No data access, Internal clock (fOSC = 82 kHz), LCD out pin No Load, 1/9 bias, 1/65 duty, op-amp. on, regulator on Note 4: VDD = 3.0 V, VCC1, 2 = VOUT4 (X5 mode), Data access cycle f CE = 1 MHz, Internal clock (OSC = 82 kHz), LCD out pin No Load, 1/9 bias, 1/65 duty, op-amp. on, regulator on Note 5: VDD = 3.3 V, VCC1, 2 - VSS = 16.5 V,/STB = L Note 6: In case of 1/65 duty and fFR = 70 Hz Note 7: VDD = 3.0 V, 1/65 duty, fFR = 70 Hz, Rosc = 430 k, Ta = 25C
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DC Characteristics (2)
Item Output Voltage (X2 Mode) Output Voltage (X3 Mode) Output Voltage (X4 Mode) Output Voltage (X5 Mode)
(Test conditions: Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Symbol VO1 VO2 VO3 VO4 Test Circuit (1) (2) (3) (4) Condition (Note 8) (Note 9) (Note 10) (Note 11) Min 4.60 6.80 9.10 11.40 Typ. 5.10 7.60 10.20 12.70 Max Unit V V V V Applicable Terminal VOUT1 VOUT2 VOUT3 VOUT4
Note 8: VIN = 2.7 V, ILoad = 200 A, VCC1, 2 = 5.40 V (external power supply) CnA - CnB = 1.0 F, VOUT1 - VSS = 1.0 F, OSC = 82 kHz, Ta = 25C Note 9: VIN = 2.7 V, ILoad = 200 A, VCC1, 2 = 8.10 V (external power supply) CnA - CnB = 1.0 F, VOUT1 - VSS = 1.0 F, OSC = 82 kHz, Ta = 25C Note 10: VIN = 2.7 V, ILoad = 200 A, VCC1, 2 = 10.80 V (external power supply) CnA - CnB = 1.0 F, VOUT1 - VSS = 1.0 F, OSC = 82 kHz, Ta = 25C Note 11: VIN = 2.7 V, ILoad = 200 A, VCC1, 2 = 13.50 V (external power supply) CnA - CnB = 1.0 F, VOUT1 - VSS = 1.0 F, OSC = 82 kHz, Ta = 25C
DC Characteristics (3)
Item
(Test conditions: Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V)
Symbol Test Circuit VHR VHRC VHRH Condition X4/X5 = 0, Ta = 25C (Note 12) X4/X5 = 1, Ta = 25C (Note 12) Ta = - 20C Ta = 60C (Note 12) (Note 12) Min 12.3 10.8 Typ. 12.5 11.0 Max 12.7 11.2 Unit V V V V Applicable Terminal VCC2 VCC2 VCC2 VCC2
Regulator Reference High Voltage (1) Regulator Reference High Voltage (2) Regulator Reference High Voltage (3)
0.999 1.012 1.025 x VHR x VHR x VHR 0.982 0.994 1.006 x VHR x VHR x VHR
Note 12: VCC1 12.8 V at Ta = -20 to 60C
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DC Characteristics (4)
Item Op-amp Output Voltage Offset (1) Op-amp Output Voltage Offset (2)
(Test conditions: Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Symbol Vopoff Test Circuit Condition (Note 13) Min -100 Typ. Max 100 Unit mV Applicable Terminal VLC0, VLC1, VLC2, VLC3, VLC4 VLC0, VLC1, VLC2, VLC3, VLC4
Vopoffs
(Note 14)
-90
90
mV
Note 13: VDD = 2.7 to 3.3 V, VSS = 0 V, 1/9 bias, 1/65 duty VCC1 = 13.0 V, VCC2 = 12.5 V, Contrast control = max Op-amp ON, DC-DC OFF, regulator OFF, LCD outpin No Load Case of VLC0: 12.5 - VLC0 = Vopoff VLC1: (VLC0 x 8/9) - VLC1 = Vopoff VLC2: (VLC0 x 7/9) - VLC2 = Vopoff VLC3: (VLC0 x 2/9) - VLC3 = Vopoff VLC4: (VLC0 x 1/9) - VLC4 = Vopoff Note 14: VDD = 2.7 to 3.3 V, VSS = 0 V, 1/9 bias, 1/65 duty VCC1 = 13.0 V, VCC2 = 12.5 V, Contrast control = max Op-amp ON, DC-DC OFF, regulator OFF, LCD outpin No Load Vopoffs = ((VLC1 - VLC2) - (VLC0 - VLC1)) + ((VLC3 - VLC4) - (VLC4 - VLC5))
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T6K14
Test Circuit
(1) DC-DC converter X2 mode
(2) DC-DC converter X3 mode
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(3) DC-DC converter X4 mode
(4) DC-DC converter X5 mode
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AC Characteristics (1)
Switching characteristics (80 series MPU 8-bit interface)
Test Conditions
(Unless Otherwise Noted,, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Item Enable Cycle Time Enable Pulse Width Enable Rise/Fall Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Data Delay Time Data Hold Time Symbol tcycE PWEL tEr, tEf tAS tAH tDS tDHW tDD (Note) tDHR (Note) Min 500 410 20 0 140 20 20 Max 25 330 Unit ns ns ns ns ns ns ns ns ns
Load Circuit
Note: Connect to Load circuit.
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AC Characteristics (2)
Switching characteristics (80 series MPU 8-bit interface)
Test Conditions
(Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Item Enable Cycle Time Enable Pulse Width Enable Rise/Fall Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Data Delay Time Data Hold Time Symbol tcycE PWEH tEr, tEf tAS tAH tDS tDHW tDD (Note) tDHR (Note) Min 500 410 20 0 140 20 20 Max 25 330 Unit ns ns ns ns ns ns ns ns ns
Load Circuit
Note: Connect to Load circuit.
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AC Characteristics (3)
Switching characteristics (68 series MPU 8-bit interface)
Test Conditions
(Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Item Enable Cycle Time Enable Pulse Width Enable Rise/Fall Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Data Delay Time Data Hold Time Symbol tcycE PWEH tEr, tEf tAS tAH tDS tDHW tDD (Note) tDHR (Note) Min 500 410 20 0 140 20 20 Max 25 330 Unit ns ns ns ns ns ns ns ns ns
Load Circuit
Note: Connect to Load circuit.
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AC Characteristics (4)
Switching characteristics (serial interface)
Test Conditions
(Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Item Clock Cycle Time Clock Pulse Width Clock Rise/Fall Time Data Set-up Time Data Hold Time Data Delay Time Symbol tcycC PWCL, PWCH tCr, tCf tDS tDH tDD Min 2000 900 300 100 Max 25 200 Unit ns ns ns ns ns ns
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AC Characteristics (5)
Switching characteristics
Test Condition
(Unless Otherwise Noted, VSS = 0 V, VDD = 2.4 to 3.3 V, Ta = 25C)
Item VDD Rise Time Reset Hold Time Reset Pulse Width Symbol VDST VRST RSTW Min 1 1 Max 1 Unit ms s s
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Application Circuit (1)
T6K14 One chip mode Using CR oscillator LCD drive bias 1/9 Using DC-DC converter (X5 mode) Using 80 series MPU Using temperature compensation
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Application Circuit (2)
T6K14 Two chip mode Using CR oscillator LCD drive bias 1/9 Using DC-DC converter (X5 mode) Using 80 series MPU Using temperature compensation
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T6K14
RESTRICTIONS ON PRODUCT USE
000707EBE
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * Polyimide base film is hard and thin. Be careful not to injure yourself on the film or to scratch any other parts with the film. Try to design and manufacture products so that there is no chance of users touching the film after assembly, or if they do , that there is no chance of them injuring themselves. When cutting out the film, try to ensure that the film shavings do not cause accidents. After use, treat the leftover film and reel spacers as industrial waste. * Light striking a semiconductor device generates electromotive force due to photoelectric effects. In some cases this can cause the device to malfunction. This is especially true for devices in which the surface (back), or side of the chip is exposed. When designing circuits, make sure that devices are protected against incident light from external sources. Exposure to light both during regular operation and during inspection must be taken into account. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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